Two codecs. One core.

The VE-2000 is a dual-codec H.264 + H.265 video encoder IP that shares silicon between codecs instead of paying for both: one verified SystemVerilog core in two throughput tiers — VE-2030 (4K30, 4 lanes) and VE-2060 (4K60, 8 lanes), same ~187 MHz operating point, architected for 22nm FDSOI — for consumer, automotive and edge silicon where watts are the budget that matters.

Request data sheet See the architecture
ArchitectureThe shared-silicon dual codec, the 4-lane CTU engine and the pipeline walkthrough.→ EvidenceByte-exact full-trailer encode vs the JM reference, and the H.265 multi-TU showcase.→ DeliverablesVerified RTL in 14 days — modules, verification environment, docs and license terms.→

Request the data sheet

The power & area whitepaper and datasheet: per-resolution power tables, area breakdown by subsystem, DVFS operating points, coverage summary and the disclosed-gaps list. Distributed under NDA — see the boilerplate mutual NDA.

VE-2000 · Burrard Systems — dual-codec H.264 + H.265 encoder IP. Performance and area figures are pre-silicon projections (Yosys synthesis + 22FDX scaling), not measured silicon.